Myrtle.ai’s VOLLO FPGA accelerator has smashed latency records in the STAC‑ML (Markets) inference benchmark, delivering 2 µs 99th‑percentile response times and halving previous bests—an achievement that could reshape how banks and trading firms deploy AI driven decision engines.
Myrtle.ai, a specialist in FPGA‑based machine learning inference, announced on April 29 that its VOLLO product was independently audited by the Strategic Technology Analysis Center (STAC). The audit, presented at the STAC Summit in London, measured VOLLO against three industry‑standard models using the STAC‑ML (Markets) Inference benchmark, a test suite designed by quant teams at leading financial institutions to evaluate latency, throughput, and resource efficiency on real‑time market data.
VOLLO’s performance was striking: a 2 µs 99th‑percentile latency, the lowest ever recorded for the benchmark, and a consistent edge in throughput and power efficiency across all three models. In practical terms, the accelerator can process market‑price updates, risk calculations, and quote generation faster than any previously tested system, giving firms the ability to run more sophisticated models without sacrificing reaction time.
The hardware under test combined a Silicom FBAP4@VP18‑2L0S PCIe accelerator card—housing an AMD Versal™ Premium VP1802 Adaptive SoC—with a Supermicro AS‑2015CS‑TNR server. The Versal chip offers PCIe Gen5 x8 connectivity and over 3.3 million programmable LUTs, a configuration that aligns well with the deterministic, microsecond‑level latency demands of high‑frequency trading (HFT) and real‑time risk analytics.
From a product perspective, VOLLO abstracts the FPGA development cycle. Developers can compile TensorFlow, PyTorch, or ONNX models directly into the accelerator without writing HDL code, dramatically lowering the barrier to entry for financial firms that lack in‑house FPGA expertise. This “no‑tool‑chain” approach mirrors the ease‑of‑use trend seen in cloud AI services while preserving the performance benefits of custom silicon.
Why does this matter for the broader fintech ecosystem? Latency is a decisive competitive factor in algorithmic trading, where a few microseconds can translate into measurable profit or loss. By delivering sub‑2 µs inference, VOLLO enables firms to adopt more complex deep‑learning models for price prediction, anomaly detection, and portfolio optimization—tasks previously constrained to simpler linear models due to speed limits. Moreover, the hardware’s efficiency could lower total cost of ownership compared with GPU‑based alternatives, which often require larger power budgets and generate higher heat output.
In the crowded market of AI inference accelerators, VOLLO’s claim to fame is its combination of ultra‑low latency, FPGA flexibility, and a developer‑friendly compilation flow. Competing solutions—such as NVIDIA’s H100 GPUs, Intel’s Habana Gaudi, and Xilinx’s Alveo cards—excel in throughput but typically report 99th‑percentile latencies in the 5‑10 µs range for comparable workloads. VOLLO’s edge stems from the deterministic nature of FPGA pipelines and the tight integration with AMD’s Versal architecture, which provides high‑speed PCIe interfaces and abundant programmable resources.
Enterprise marketing teams stand to benefit from these technical gains as well. Faster inference translates into more responsive customer‑facing applications, such as real‑time fraud detection in digital payments or instant credit‑risk scoring in embedded finance platforms. Marketing narrative can be leveraged to differentiate offerings in a market where speed and reliability are increasingly scrutinized by regulators and end users alike. Marketing teams can highlight these performance advantages in product positioning.
The broader implication is a potential shift in the architecture of financial AI workloads. As more firms adopt FPGA‑based inference, we may see a migration away from GPU‑centric data centers toward hybrid deployments that pair CPUs with low‑latency accelerators for mission‑critical tasks, while relegating batch training to cloud GPU farms. This aligns with Gartner’s forecast that by 2027, 30 % of AI workloads will run on purpose‑built accelerators, up from 12 % today.
Myrtle.ai’s partnership with AMD, Silicom, and Supermicro underscores an ecosystem approach, reminiscent of the collaborative stacks built around Google Cloud’s TPU or Microsoft’s Azure FPGA services. By aligning hardware, software, and system integrators, the company positions VOLLO as a turnkey solution for banks, hedge funds, and fintech startups seeking to embed AI at the core of their trading and risk platforms.
Subheadings
- Benchmark Breakthrough – Details of the STAC‑ML results and latency figures.
- Hardware Stack – The role of AMD Versal, Silicom’s FBAP4 card, and Supermicro servers.
- Developer Experience – How VOLLO eliminates the need for HDL expertise.
- Competitive Landscape – Comparison with GPU and other FPGA solutions.
- Enterprise Implications – Impact on marketing, product differentiation, and operational costs.
- Future Outlook – Potential shift toward hybrid accelerator architectures in finance.
Market Landscape
The financial technology sector is increasingly demanding sub‑millisecond processing for AI‑driven decision making. According to a McKinsey report, AI‑enabled trading strategies could boost market efficiency by up to 15 % if latency barriers are removed. Meanwhile, IDC predicts that worldwide spending on AI inference hardware will surpass $25 billion by 2026, with FPGA solutions capturing a growing share due to their deterministic performance. The STAC benchmark, long regarded as the gold standard for market‑data inference, now includes a FPGA‑based contender, signaling broader acceptance of programmable silicon in high‑frequency finance.
Top Insights
- VOLLO’s 2 µs 99th‑percentile latency halves the previous STAC benchmark record, setting a new performance ceiling for real‑time market AI.
- The accelerator’s no‑code‑HDL workflow lowers development costs, enabling fintechs without FPGA talent to adopt ultra‑low‑latency inference.
- Compared with leading GPUs, VOLLO delivers up to 40 % lower latency for identical models, offering a compelling power‑efficiency advantage.
- Enterprise marketers can leverage the speed narrative to differentiate digital‑payment and embedded‑finance products in a crowded marketplace.
- The success of VOLLO may accelerate a shift toward hybrid AI infrastructures, where FPGAs handle latency‑critical tasks and GPUs manage bulk training.
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